amd xsave: Enable SVM intercept for xsetbv instruction.

SVM introduces an intercept control bit for xsetbv instruction. This
patches enables xsetbv intercept for SVM.

Signed-off-by: Wei Huang <wei.huang2@amd.com>

diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c
index 87da6144916170737da7ca5445dcfbb8686a620c..99dc83ad49d5911cca54a1727db965919202b262 100644 (file)
--- a/xen/arch/x86/hvm/svm/emulate.c
+++ b/xen/arch/x86/hvm/svm/emulate.c
@@ -76,7 +76,7 @@ static unsigned long svm_nextrip_insn_length(struct vcpu *v)
         /* (exitcodes 84-95) are reserved */
     case VMEXIT_IDTR_READ ... VMEXIT_TR_WRITE:
     case VMEXIT_RDTSC ... VMEXIT_MSR:
-    case VMEXIT_VMRUN ...  VMEXIT_MWAIT_CONDITIONAL:
+    case VMEXIT_VMRUN ...  VMEXIT_XSETBV:
         /* ...and the rest of the #VMEXITs */
     case VMEXIT_CR0_SEL_WRITE:
     case VMEXIT_EXCEPTION_BP:

diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 1cd81d7786ec5ab2c2bae33958a85d16e1c44f04..1e55e8ccdc23a3cfa7388fcf3c535dfaa9d581b3 100644 (file)
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -127,7 +127,8 @@ static int construct_vmcb(struct vcpu *v)
         GENERAL2_INTERCEPT_VMLOAD      | GENERAL2_INTERCEPT_VMSAVE      |
         GENERAL2_INTERCEPT_STGI        | GENERAL2_INTERCEPT_CLGI        |
         GENERAL2_INTERCEPT_SKINIT      | GENERAL2_INTERCEPT_MWAIT       |
-        GENERAL2_INTERCEPT_WBINVD      | GENERAL2_INTERCEPT_MONITOR;
+        GENERAL2_INTERCEPT_WBINVD      | GENERAL2_INTERCEPT_MONITOR     |
+        GENERAL2_INTERCEPT_XSETBV;
 
     /* Intercept all debug-register writes. */
     vmcb->dr_intercepts = ~0u;

diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h
index 10ff3945a0edd035af2da2a614196eb0a5b89642..fd481005ca0b52dfcc12048ded71d7b23a866c90 100644 (file)
--- a/xen/include/asm-x86/hvm/svm/vmcb.h
+++ b/xen/include/asm-x86/hvm/svm/vmcb.h
@@ -76,7 +76,8 @@ enum GenericIntercept2bits
     GENERAL2_INTERCEPT_WBINVD  = 1 << 9,
     GENERAL2_INTERCEPT_MONITOR = 1 << 10,
     GENERAL2_INTERCEPT_MWAIT   = 1 << 11,
-    GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12
+    GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12,
+    GENERAL2_INTERCEPT_XSETBV  = 1 << 13
 };